Answer the following (2 x 10)
1. The frequency of the clock signal given at X1 and X2 input pins of 8085 is around
(a) 3 MHz
(b) 4 MHz
(c) 5 MHz
(d) 6 MHz
2. READY pin of is used by 8085
(a) For sending signals to slow peripheral devices
(b) For receiving signals from slow peripheral devices
(c) Both (a) and (b)
(d) T0 indicate that 8085 is ready for data transfer
3. How many times 8085 will make RD signal low in order to execute LDA 2400H?
4. Contents of A register after the execution of the following 8085 microprocessor program is
MVIA, 55 H
MVI C, 25 H
5. Which of the following is an external interrupt?
(a) INT 0 (active low)
(b) INT 2 (active low)
(c) Timer 0 interrupt
(d) Timer 1 interrupt
6. What will be the content of the stack pointer of 8051 if it is reset?
7. In 8051 stack pointer is incremented by
(a) 1 if data is pushed onto the stack
(d) 1 if data is popped from the stack
(c) 2 if data is pushed onto the stack
(d) 2 if data is popped from the stack
8. Which port of 8051 is not having a dual function
(a) Port 0
(b) Port 1
(c) Port 2
(d) Port 3
9. In 8086 die size of the instruction queue is of
(a) One byte
(b) Three bytes
(c) Six bytes
(d) Eight bytes
10. In 8086 the size of the program counter is 16 bit and it can access the total memory of
(a) 2¹⁶ bytes
(b) 2²⁰ bytes
(c) 2³² bytes
(d) 2⁶⁴ bytes
1. (a) A crystal is connected at these two pins. The frequency is internally divided by two, therefore, to operate a system at 3 MHZ the crystal should have a frequency of 6 MHZ.
2. (c) It is used by microprocessors to detect whether a peripheral has completed (or is Ready for) the data transfer or not. The main function of this pin is to synchronize slower peripheral to the faster microprocessors. If the ready pin is high the microprocessor will complete the operation and proceeds for the next operation. If the ready pin is low the microprocessor will wait until it goes high.
3. (c) The instruction LDA 2400H will load the content of the memory location 2400H into the accumulator. In the code form, it is written as 3A, 00, 24.
4. (a) After ADD C accumulator becomes 01111010=7AH
5. INT0 (active low) and INT1 (active low) are two external interrupt inputs provided by 8051.
6. (b) When the 8051 is reset, the stack pointer is set to address 07h. This means the stack area will begin at address 08h.
7. (a) In the 8051, the stack pointer (SP) points to the last used location of the stack. When data is pushed onto the stack, the stack pointer (SP) is incremented by 1.
8. (b) P0 and P2 are assigned the address lines from A0 to A15 which are used for external interfacing to memory but only if needed. P1 offers no dual nature so it can be used only for input/output.
9. (c) In 8086 processors the Instruction fetch takes more time. If the queue size is more then the Bus Interface Unit will take more time to fill the queue. Hence only 6 bytes.
10. (b) Intel 8086 uses 20 address lines and 16 data- lines. It can directly address up to 2²⁰ = 1 Mbyte of memory.
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