Skip to main content

Posts

Showing posts with the label AMIE - Microprocessors and Microcontrollers

Microprocessors and Microcontrollers - MCQs from AMIE exams (Summer 2018)

Answer the following (2 x 10) 1. The frequency of the clock signal given at X1 and X2 input pins of 8085 is around (a) 3 MHz (b) 4 MHz (c) 5 MHz (d) 6 MHz 2. READY pin of is used by 8085 (a) For sending signals to slow peripheral devices (b) For receiving signals from slow peripheral devices (c) Both (a) and (b) (d) T0 indicate that 8085 is ready for data transfer 3. How many times 8085 will make RD signal low in order to execute LDA 2400H? (a) 1 (b) 2 (c) 3 (d) 4 4. Contents of A register after the execution of the following 8085 microprocessor program is  MVIA, 55 H MVI C, 25 H ADDC DAA (a) 7AH (b) 80H (c) 50H (d) 22H 5. Which of the following is an external interrupt? (a) INT 0 (active low) (b) INT 2 (active low) (c) Timer 0 interrupt (d) Timer 1 interrupt 6. What will be the content of the stack pointer of 8051 if it is reset? (a) 00H (b) 07H (c) 08H (d) FFH 7. In 8051 stack pointer is incremented by (a) 1 if data is pushed onto the stack (d) 1 if data is popp...

Microprocessors and Microcontrollers - MCQs from AMIE exams (Winter 2018)

Choose the correct answer (2 x 10) 1. The internal RAM memory of the 8051 is (a) 32 bytes (b) 64 bytes (c) 128 bytes (d) 256 bytes 2. This program code will be executed continuously:  STAT: MOV A, #01H JNZ STAT (a) True (b) False 3. The 8051 has ------16-bit counter/timers. (a) 1 (b) 2 (c) 3 (d) 4 4. The address space of the 8051 is divided into four distinct areas: internal data, external data, internal code, and external code. (a) True (b) False 5. In the 8086 microprocessor, the address bus is a ---- bit wide (a) 12 (b) 10 (c) 16 (d) 20 6. The 1 MB of memory can be divided into ---------- segment (a) 1 Kbyte (b) 64 Kbyte (c) 33 Kbyte (d) 34 Kbyte 7. In 8086 BIU stands for ------- 8. Which of the following 8085 interrupts is nonmaskable? (a) RST 7.5 (b) INTR (c) RST 6.5 (d) TRAP 9. Which of the following interrupt is a non vectored interrupt? (a) RST7.5 (b) INTR (c) RST6.5 (d) TRAP 10. Maximum size of memory for 8085 microprocessor (a) 1 MB (b) 16 KB (c) 64 KB (d) 32 KB Answers 1...

Microprocessors and Microcontrollers - MCQs from AMIE exams (Summer 2019)

Multiple Choice Questions ( 2 x 10) 1. In 8085 name/names of the 16-bit registers is/are (a) Stack pointer (b) Program counter (c) Both a and b (d) None of these 2. Which is used to store critical pieces of data during subroutines and interrupts: (a) Stack (b) Queue (c) Accumulator (d) Data register 3. Each memory location has (a) Address (b) Contents (c) Both A and B (d) None of these 4. Basic steps of execution of an instruction is (a) fetch —> execute —> decode (b) decode —>  fetch —>  execute (c) execute —> fetch —> decode (d) fetch —>  decode —>  execute 5. A microprocessor with a 12-bit address bus will be able to access (a) 1 KB (b) 2 KB (c) 4 KB (d) 8 KB 6. The instruction of the 8086 microprocessor that is used to transfer the data from the source operand to the destination operand is (a) data copy/transfer instruction (b) branch instruction (c) arithmetic/logical instruction (d) string instruction 7. BIU strands f...

Microprocessors and Microcontrollers - MCQs from AMIE exams (Winter 2019)

Choose the corner answer (2 x 10) 1. The intel 8086 processor is a ____ processor. (a) 8 bit (b) 16 bit (c) 32 bit (d) 64 bit 2. In 8086 microprocessor the address bus is ____ bit wide. (a) 10 bit (b) 12 bit (c) Mbit (d) 20 bit 3. An I/O processor controls the flow of information between (a) Each memory and I/O devices (b) Main memory and I/O devices (c) Two VO devices (d) Cache and main memory 4. The instruction. MOV AX, (BX) is an example of (a) Direct addressing mode (b) Register addressing mode (c) Register relative addressing mode (d) Register indirect addressing mode 5. If an interrupt request given to an input pin cannot be disabled by any means, then the input pin is called: (a) Maskable interrupt (b) Non-Maskable interrupt (c) Maskable interrupt and Non-Maskable interrupt (d) None of the mentioned 6. In BSR mode, only port C can be used to (a) Set individual ports (b) Reset individual ports (c) Set and reset individual ports (d) Programmable I/O ports 7. DEBUG is able to...

Microprocessors and Microcontrollers - short answer type questions from AMIE exams (Winter 2020)

Answer all questions (2 x 10) What are the uses of PUSH and POP operations in 8085 microprocessors? In a stack, all operations take place at the "top" of the stack. The "push" operation adds an item to the top of the stack. The "pop" operation removes the item on the top of the stack and returns it. How many I/O ports are there in 8051? Which port is bit addressable? 8051 microcontrollers have 4 I/O ports each of 8-bit, which can be configured as input or output. Hence, total 32 input/output pins allow the microcontroller to be connected with the peripheral devices. All ports of 8051 are bit addressable List the interrupts in the order of priority for 8051 MCU. Interrupts are the events that temporarily suspend the main program, pass the control to the external sources and execute their task. It then passes the control to the main program where it had left off. 8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be enabled or...